An algorithm generating multi-level NAND logic circuits
نویسندگان
چکیده
منابع مشابه
Level Restoration for Multi-valued Logic Circuits
Compared to binary logic, the multi-valued logic circuits provide very small chip size, higher speed, and small number of interconnections and simpler realization of logic functions. However, the main drawback of these circuits is the lower noise margin. The noise margin decreases as the radix of multi-valued system increases. Due to the low noise margins, it is necessary to restore or recover ...
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ژورنال
عنوان ژورنال: IEEJ Transactions on Fundamentals and Materials
سال: 2001
ISSN: 0385-4205,1347-5533
DOI: 10.1541/ieejfms1990.121.10_962